TYTUŁ ARTYKUŁU

Capacitance/Resistance Modeling and Analog Performance and Evolution of 3-D SOI FinFET Structure for Circuit Perspective Application

AUTORZY
Neeraj Jain, Balwinder Raj
TYTUŁ CZASOPISMA
World Scientific News
WYDANIE
2018 / Tom 113
STRONY
194 - 209
ROK
2018
WYDAWCA
Scientific Publishing House „DARWIN”
ISSN
2392-2192

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CZYSTY TEKST

Neeraj Jain, Balwinder Raj, Capacitance/Resistance Modeling and Analog Performance and Evolution of 3-D SOI FinFET Structure for Circuit Perspective Application , World Scientific News, 2018 / Tom 113, s. 194 - 209

BIBTEX

Neeraj Jain and Balwinder Raj. Capacitance/Resistance Modeling and Analog Performance and Evolution of 3-D SOI FinFET Structure for Circuit Perspective Application. World Scientific News, 113:194–209, 2018.

Pokaż kod BibTeX 
@article{bazhum197728,
  author = {Jain, Neeraj and Raj, Balwinder},
  title = {{Capacitance/Resistance Modeling and Analog Performance and Evolution of 3-D SOI FinFET Structure for Circuit Perspective Application}},
  journal = {World Scientific News},
  year = {2018},
  volume = {113},
  pages = {194--209},
  issn = {2392-2192},
  url = {https://bazhum.muzhp.pl/articles/197728}
}