Neeraj Jain
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Capacitance/Resistance Modeling and Analog Performance and Evolution of 3-D SOI FinFET Structure for Circuit Perspective Application Opublikowano w: World Scientific News 2018 / Tom 113 / s. 194 - 2092018CZYSTY TEKST
Neeraj Jain, Balwinder Raj, Capacitance/Resistance Modeling and Analog Performance and Evolution of 3-D SOI FinFET Structure for Circuit Perspective Application , World Scientific News, 2018 / Tom 113, s. 194 - 209
BIBTEX@Article{ authors = " Neeraj Jain, Balwinder Raj", title = "Capacitance/Resistance Modeling and Analog Performance and Evolution of 3-D SOI FinFET Structure for Circuit Perspective Application ", journal = "World Scientific News", issue = "2018 / Tom 113", pages = "194 - 209" }